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KAWAHARA Takayuki  Professor
Tokyo University of Science, Faculty of Engineering, Department of Electrical Engineering
Profile | Topics | Laboratories | Assigned Courses(12)
Refereed Papers(47) | Refereed Proceedings(94) | Other Papers(38) | Publications(5) | Presentations(165) | Patent(3)
Address 6-3-1, Niijuku, Katsushika-ku, Tokyo 125-8585, Japan
TEL : +81-3-5876-1717
E-mail Address
Homepage
Information about TUS https://www.tus.ac.jp/academics/teacher/lightbox/69ac.html
Pure
(Researcher Profiling Tool)		 https://tus.elsevierpure.com/ja/persons/takayuki-kawahara
Under-Graduate School
  • 1983, Kyushu University Faculty of Science Department of Physics 
Graduate School
  • 1985, Kyushu University Graduate School, Division of Natural Science Department of Physics Master's Degree
Postgraduate Qualification
  • Kyushu University Doctor of Philosophy in Engineering
Research History
  • 1985-1991 High-speed BiCMOS DRAM design
    1991-1993 Low-power DRAM design (low-leakage current circuit, charge-recycle circuit)
    1993-1997 Fast-programing large-scale Flash memory design
    1997-1998 Biology-inspired circuits design
    1999-2003 Ultra low-power CMOS circuits design for system LSI and SRAM
    2003-2005 Low-voltage memory and circuits design using FD-SOI with thin-BOX
    2005-2007 Low-power circuits design for petascale supercomputer
    2005-2011 Spin-transfer torque memory (STT-RAM) design and its applications
    2010-2013 Nanopore/ISFET circuits design for DNA sequencer
    2014-Present Study on Sustainable / Intelligent Processing Electronics
Employment History
  • 1985-1990 Hitachi Central Research Laboratory (HCRL), Research Staff Member
    1990-1996 HCRL, Researcher
    1996-1998 HCRL, Senior Researcher
    1997-1998 Swiss Federal Institute of Technology Lausanne (EPFL), Visiting Researcher
    1998-1999 Hitachi System LSI Development Center, Senior Engineer
    1999-2005 HCRL, Unit Leader (Senior Researcher)
    2005-2014 HCRL, Chief Researcher
    2014- Electrical Engineering, Tokyo University of Science, Professor
Research Keyword Sustainable / Intelligent Processing Electronics
Research Area
  • Electron device/Electronic equipment (Sustainable/Electronic Circuits/Device Engineering)
Research Theme
  • ・Artificial intelligence (AI) circuit/system (Ising machine) ・Sensor information artificial intelligence (AI) processing ・Spintronics (AI logic, memory) ・Quantum computer (quantum computation method, hardware)
Academic Awards Received
  • 2024.11.13

    Best Paper Award (iSAI/NLP2024)

  • 2022.12.14

    SEMICON Japan 2022 Academia Award: Sponsor Award (Muratech Award)

  • 2020.12.10

    Best Paper Award (IEEE APCCAS 2020)

  • 2017.4.11

    Prizes for Science and Technology, Development Category, by the Minister of Education, Culture, Sports, Science and Technology

  • 2015.10.14

    Best Poster Award (NVMTS 2015)

  • 2014.9.24

    IEICE Electronics Society Award (IEICE: The Institute of Electronics, Information and Communication Engineers) (Pioneering research and development on STT-RAM large-capacity circuit technology)

  • 2010.4

    IEEE Service Award (for outstanding contributions as ISSCC ITPC Far East regional chair 2008-2010)

  • 2009.11

    The Yamazaki-Teiichi Prize

  • 2009.4

    IEEE Service Award (for his leadership in the coordination and conduct of highlights of ISSCC 2009)

  • 2008.1

    IEEE Distinguished Lecturer

  • 2007.1

    IEEE Fellow

  • 2000.11

    The Significant Invention Award by Governor of Yamanashi-prefecture

Academic Society Affiliations
  • 2024.1 - 2025.12

    IEEE Circuits and Systems Society IEEE Open Journal of Circuits and Systems Editorial Board

  • 2022.1 - 2023.12

    IEEE Circuits and Systems Society Editorial Board, Transactions on Circuits and Systems I

  • 2017.5 - 2018.3

    IEEE Industrial Electronics Society (IES) IEEE Fellow Evaluation Committee Member

  • 2015.4 - 2016.2

    IEEE International Solid-State Circuits Conference (ISSCC) Forum Oversee Committee member

  • 2014.4 - 2015.2

    IEEE International Solid-State Circuits Conference (ISSCC) Forum selection committee member

  • 2013.4 - 2014.2

    IEEE International Solid-State Circuits Conference (ISSCC) Student Research Preview (SRP) committee member

  • 2012.4 - 2014.3

    IEEE Circuits and Systems Society (CASS) IEEE Fellow Evaluation Committee Member

  • 2011.12 - 2012.11

    IEEE Biomedical Circuits and Systems Conference (BioCAS) Demonstration subcommittee Chair

  • 2008.4 - 2010.3

    IEEE International Solid-State Circuits Conference (ISSCC) ITPC Far East regional subcommittee Chair

  • 2007.7 - 2013.6

    IEEE International Memory Workshop (IMW) Scientific committee member

  • 2005.4 - 2007.6

    IEEE Symposium on VLSI Circuits Secretary/Publicity

  • 2004.7 - 2005.6

    IEEE Symposium on VLSI Circuits Best student paper award subcommittee Chair

  • 2004.4 - 2010.3

    IEEE International Solid-State Circuits Conference (ISSCC) Executive committee member

  • 2000.4 - 2007.2

    IEEE International Solid-State Circuits Conference (ISSCC) Memory subcommittee member

  • 2000.4 - 2003.2

    IEEE International Solid-State Circuits Conference (ISSCC) Technology Direction subcommittee member
Guest Professor
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