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KANEMOTO Daisuke  Associate Professor
Tokyo University of Science, Faculty of Engineering, Department of Electrical Engineering
Profile | Laboratories | Assigned Courses(14)
Refereed Papers(16) | Refereed Proceedings(25) | Publications(1) | Presentations(22)
Address 6-3-1, Niijuku, Katsushika-ku, Tokyo 125-8585, Japan
TEL : +81-3-5876-1717
E-mail Address
Homepage https://kanemoto.tech
Information about TUS https://www.tus.ac.jp/academics/teacher/lightbox/7c72.html
Pure
(Researcher Profiling Tool)
https://tus.elsevierpure.com/ja/persons/daisuke-kanemoto/
Under-Graduate School
  • 2004, Kyoto Institute of Technology Faculty of Engineering and Design Department of Electronics and Information Science 
Graduate School
  • 2011, Osaka University Graduate School, Division of Engineering Division of Electrical, Electronic and Information Engineering Doctoral Degree
Postgraduate Qualification
  • Osaka University Ph.D. in Engineering
Research History
  • Apr. 2026-Present
    Associate Professor, Tokyo University of Science.
    Compressed-sensing-based LSI, implementation, and algorithm development.

    Jun. 2019-Mar. 2026
    Associate Professor, The University of Osaka.
    Compressed-sensing-based LSI, implementation, and algorithm development.

    May 2015-May 2017
    Visiting Assistant Professor, Stanford University.
    Compressed-sensing-based sensing-system LSI development.

    May 2015-May 2017
    JSPS Overseas Research Fellow.
    Compressed-sensing-based sensing-system LSI development.

    Apr. 2013-May 2019
    Assistant Professor, University of Yamanashi.
    Compressed-sensing-based sensing-system R&D.

    Nov. 2010-Mar. 2013
    Assistant Professor, Kyushu University.
    Wireless-communication LSI development.

    Apr. 2009-Nov. 2010
    Specially Appointed Researcher, Osaka University.
    Low-power delta-sigma modulator LSI research.

    Apr. 2006-Mar. 2009
    Doctoral Program, Osaka University.
    Low-power delta-sigma modulator LSI research.

    Aug. 2004-Mar. 2026
    Synthesis Corporation.
    LSI design.

    Apr. 2004-Mar. 2006
    Master's Program, Osaka University.
    Delta-sigma modulator LSI research.

    Apr. 2000-Mar. 2004
    Kyoto Institute of Technology.
Employment History
  • 200904-201011 Osaka University
    201011-201303 Kyushu University, Graduate School and Faculty of Information Science and Electrical Engineering, Assistant professor
    201304-201905 University of Yamanashi, Interdisciplinary Graduate School of Medicine and Engineering, Assistant professor
    201505-201705 Japan Society for the Promotion of Science, JSPS Overseas Research Fellow
    201505-201705 Stanford University, School of Engineering Department of Electrical Engineering, Visiting Assisatant Professor
    201906-202603 The Univesity of Osaka, Graduate School of Engineering Department of Electrical, Electronic and Communication Engineering, Associate Professor
    202604- Tokyo University of Science, Faculty of Engineering, Department of Electrical Engineerin, Associate Professor
Research Keyword Integrated circuit design, sensing, system implementation, algorithms, low power, battery-free, energy harvester, compressed sensing
Research Area
  • Computer system (LSI design, sensing system implementation, algorithms, and IoT)
Research Theme
  • Research on Battery-Free Measurement Systems Using Compressed Sensing
Academic Awards Received
  • 2026.5.14

    IEEE SSCS Japan Chapter Academic Research Award

  • 2026.5.14

    電子情報通信学会集積回路研究会 若手研究会優秀ポスター賞

  • 2026.4.17

    IEEE Symposium on Low-Power and High-Speed Chips and Systems Featured Poster Award

  • 2026.3.9

    大阪大学工学研究科 令和7年度研究科長表彰

  • 2025.12.3

    電子情報通信学会 VLD研究会優秀技術報告賞

  • 2025.12.3

    デザインガイア 優秀ポスター賞

  • 2025.11.4

    IEEE CAS Society Kansai Chapter Best Student Presentation Award

  • 2025.11.4

    SLDM 研究発表会 WIP 最優秀賞

  • 2025.8.27

    情報処理学会 SLDM研究会 2024年度優秀発表賞

  • 2025.8.27

    情報処理学会 SLDM研究会 2024年度優秀論文賞

Academic Society Affiliations
Guest Professor
  • 2015.6.1 - 2017.5.31

    スタンフォード大学

  • 2026.4.1 - 2027.3.31

    大阪大学

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